As for non-threshold function, a novel logic synthesis algorithm is proposed, which can transform non-threshold function to the sum of some threshold functions. 对于非阈值函数,该文提出了新的逻辑函数综合算法,可以将任意非阈值函数转化为几个阈值函数和的形式。
Now the success of, the commercial success of logic synthesis is probably due to two factors. 现在的成功,在商业上的成功逻辑综合可能是由于两个因素造成的。
Logic Synthesis and Equivalence Checking of Communication Chip 一款通信芯片的逻辑综合和等价性验证
Finally, their applications in the logic synthesis based on the partial linear function and calculating Boolean difference of logical functions are discussed. 最后讨论了它们在逻辑综合以及计算逻辑函数的布尔差分中的应用。
The emphasis is placed on the use of VHDL logic synthesis for optimization of the multiplier. Xilinx FPGA implementation, functional and timing simulation are performed. 重点是运用VHDL逻辑综合优化该乘法器,并进行了乘法器的XILINXFPGA实现、功能仿真和时序仿真。
In logic synthesis and verification, information of symmetry variables can improve algorithms 'efficiency. 变量的对称性在逻辑综合与优化、工艺映射中起着非常重要的作用.如果事先得到变量对称的信息,就可以减小解空间,提高逻辑验证的效率。
A high performance radiate path matching algorithm is proposed for logic synthesis of integrated circuit reverse analysis. 提出一种基于子图同构的高性能辐射路匹配算法,以满足反向分析中逻辑综合的需要。
This paper introduces the design method of parallel adder. On the basis we design an adder by the adoption of carry skip algorithm with carry strength signals and implement, through logic synthesis and layout. 首先介绍了常用并行加法器的设计方法,并在此基础上采用带进位强度的跳跃进位算法,通过逻辑综合和布局布线设计出了一个加法器。
Sequential logic synthesis is an important part of RTL synthesis system design. 时序逻辑综合是RTL综合系统设计中的一个重要部分。
The fourth chapter is the implementation part of carrier recovery in ASIC, including structure division, hardware design logic synthesis and verification. The ASIC design skills oriented to synthesis and DFT ( Design for Test) are discussed in the end. 第四章给出载波同步在ASIC设计中的具体实现,包括结构划分、硬件设计、逻辑综合和验证等,最后讨论了面向综合的ASIC设计技巧和可测性设计。
PLS algorithm is presented as a new logic synthesis algorithm for PAL. 本文针对PAL器件的分析提出一种新型逻辑综合算法,即PLS算法。
Hardware synthesis method of behavior function level logic synthesis system 行为功能级逻辑综合系统中的硬件综合方法
Study of Based on the Threshold Gate Network for Logic Synthesis 基于阈门网络的逻辑综合问题研究
The entry of high-level logic synthesis VHDL is introduced, too. 文中还介绍了作为系统逻辑综合系统入口的VHDL语言。
The technology of constitute scheme, modularize design flow, simulate and emulate, logic synthesis, cooperate with software and hardware has been researched and mastered from the point of application. 对设计方案的制订、模块化设计流程、模拟仿真、逻辑综合、软硬件协同设计等技术从应用的角度进行了分析研究和掌握。
It is used data of randomized o f logic unit in logic synthesis to experiment for the algorithm. 并利用逻辑综合中逻辑单元的随机覆盖问题产生的随机数据,对算法加以验证。
Optimization in automatic logic synthesis is usually done after the Boolean equations are set up. 逻辑自动综合中控制部分的优化一般是在布尔方程确定之后进行。
The research in the logic synthesis of VHDL language VHDL语言逻辑综合的研究
Logic synthesis is an important theory of design automation. 逻辑综合是数字系统自动化设计的重要理论之一。
Realization of Sequential Logic Synthesis in RTL Synthesis System Design RTL综合系统设计中时序逻辑综合的实现方法
Research and Realization of Combinational Logic Synthesis in VHDL High-Level Synthesis System VHDL高级综合系统中组合逻辑综合的研究与实现
According to the knowledge and material accumulated from the authors 'research in recent years on large scale PLD automatic design, new theory, methods and trend of research progress on PLD's logic synthesis algorithm are synthetically analyzed in this paper. 依据近年来对新型PLD自动设计研究所积累的知识和资料,综合分析了PLD逻辑综合方向上国内外研究发展的新理论、新方法和新动向;
Reversible logic synthesis is an emerging research area, which has important theoretical significance and potential application value in quantum communication, low-power circuit design, information security, and many other research area. 可逆逻辑综合是一个新兴的研究领域,对量子通信、低功耗电路设计和信息安全等诸多研究领域具有重要的理论意义和实际应用价值。
Aiming at it, this thesis researches on the logic synthesis from two phases: technology independent and technology dependent logic synthesis. 针对此问题,本文从工艺无关和工艺相关两个方面对逻辑综合方法进行了研究与设计。
Reversible logic gate cascade is an important part of reversible logic synthesis. 可逆逻辑门级联是可逆逻辑综合的重要组成部分。
This dissertation detailedly investigate the symbolic logic and some typical techniques for low power FSM logic synthesis and optimization. 论文详细讨论了低功耗有限状态机综合与优化中的符号逻辑和一些典型方法。
The thesis introduced the back-end design flow of Ethernet controller chip under the sub-micro technics, discussed and resolved the problems of the logic synthesis, physical implementation and physical verification in detail. 本文介绍了亚微米条件下以太网控制器芯片的后端设计流程,全面分析和解决了逻辑综合、物理实现和验证方面的问题。
Finally, it downloaded to the FPGA after logic synthesis. 最后进行逻辑综合后下载到FPGA中进行验证。
This paper uses a literature review, case studies, law and logic synthesis and other research methods, a more systematic study of the ruins of public protection and landscape planning. 本文综合运用了文献综述法、案例分析法以及逻辑综合法等研究方法,对于遗址公保护与景观规划进行了较为系统的研究。
After studying the architecture of the DSP chip and the System-level requirements, we have thoroughly completed its logic design, functional verification, logic synthesis and code optimization by using semi-custom design method. 本文针对该款DSP芯片的总体结构和性能需求,采用半定制的设计流程,完成了该芯片中DMA控制器的逻辑设计、功能验证、逻辑综合和代码优化等工作。